There's a lot to be said for open source ISAs like RISC-V. But it's a lot harder to create a top of the line open source microarchitecture implementing it that's competitive to closed source designs. A Linux kernel developer can make changes and test them several times a day for a cost in electricity measured in cents. An equivalent build/test cycle on a CPU core is going to be north of a month and a million dollars. Simulation helps but to optimize speed and yield you really need to build the chips and due to physical effects that's a process with much weaker abstraction barriers than software development. So I'm skeptical that we'll ever have cutting edge open source microarchitectures.
I am not talking about open source architecture, but more about a worldwide non-toxic ISA: namely anybody can create FREELY a RISC-V microarchitecture AT WORLWIDE SCALE, and that closed or open, which you cannot with arm or x86.
Ofc, worldwide royalty free is not enough (or just be allowed to implement the ISA...), silicium is really about performance, and I sincerely hope RISC-V will end up providing microarchitectures (open or not) "good enough" to do the job.
I am perfectly aware RISC-V will fail if not providing at scale really good implementations. Rumors say "really performant" implementations are not expected before 2024.
> namely anybody can create FREELY a RISC-V microarchitecture AT WORLWIDE SCALE
The problem with this argument is that it ignores the cost of creating the microarchitecture. It’s almost certainly cheaper to license an Arm A series core than to create a comparable RISC-V core from scratch.
Sure we have a firm like SiFive that licenses RV cores to third parties but the existence of firms like Arm and SFive shouldn’t be taken for granted. If rumour has it SiFive were almost taken over by Intel. Thankfully Nvidia were stopped from buying Arm.
If you wish for Arm’s demise you may get the end of their business model and that probably isn’t a great outcome.
risc-v is not limited to sifive, there are several other implementations. And yes, arm and x86 made angry ppl with enough resources to make happen risc-v, and it has been a decade and it is still gaining momentum even if the market is over-saturated with arm and x86. That's last point is really positive, and it allows us to think risc-v could be successful.
But I agree that without _REALLY_ performant implementations, risc-v WILL fail and rumors say that things won't start to get serious before 2024. Nevertheless, in its current state, failure is still a more than valid outcome.
A word of caution: until the "performance" is actually here, better stay humble.
As far as I know and specs wise, RISC-V has been kind of ready for a while, only missing very high performance implementations.
My first real risc-v target is a 100% RV64 assembly keyboard firmware though. Looking at mango pi pro mq boards, but I wish we had 'smaller' RV64 GPIO/USB boards for that, maybe a small GPIO/USB board with a USB block+FPGA with enough gates to instance a small RV64 core.
I think this may be a bit too many instructions (I did not see hardware accelerated memcpy/memset though). I guess I would use only a small subset of them. Since RISC-V is a royalty free standard, writting directly assembly is worth it, until the abuse of a macro processor and code generation is avoided.
I want to share you optimism, but I advise you to keep your cool. There is a long road to reach the performance of x86/arm microarchitectures (it is harder for risc-v since the "market is over saturated"). And those performant implementations must get access to the best silicium node process... and that...
