Many people have complained about the quality of TCC code. It sometimes feel the code id one big unittest including all nasty C edge cases. I found this out when developing an even tinnier C compiler to compile TCC 0.9.26.
I think that if you as 60+ person cannot bike without support your brain is probably also not fit enough anymore for the speed you are going to ride at. So, I advice older people not to use an e-bike. I am not going to use one. Maybe a trike is a safe option at speeds not exceeding 10km/h.
Are there also open-source solutions without dependency on server in the cloud and that depend on internet connection? I am looking for a total home solution where I can communicate with doorbel through laptop with headset.
Is comparing a signed integer with an unsigned integer UB? I resently wrote some code and compiled it with gcc to x86_64 (without optimization) that returned an incorrect answer.
When comparing signed and unsigned integers of same size the signed one will be converted to unsigned. In a reasonably configured project compiler will warn about it.
In case of integers smaller than int, promotion to int happens first.
In case of signed and unsigned integers of different size, the smaller one will be converted to bigger one.
This is one of the most frustrating things as being a software engineer: working on solutions that you feel that are not going to work. In some cases, I was the one saying that a particular solution was not going to work. It did not bring me any good.
Question: I once heard somebody talk about a micro-controller (with a minimal instruction set) where every register could be the program counter. It did not have jump or call instructions. You had 'emulate' those with the instruction (possibly conditionally) that changed the assignment of the program counter to one of the instructions. If I am not mistaken, it had eight registers. Does this ring a bell?
That description does not match the RCA 1802 [1] perfectly, but it is probably the best known microprocessor (not a microcontroller, though) without a dedicated program counter. There are a lot of misconceptions about it floating on the internet, so I would not be surprised to hear it described as you did.
“The ARM architecture provides sixteen 32-bit general purpose registers (R0-R15) for software use. Fifteen of them (R0-R14) can be used for general purpose data storage, while R15 is the program counter whose value is altered as the core executes instructions. An explicit write to R15 by software will alter program flow.”
Similarly, the PDP-11 used R7 for that. https://en.wikipedia.org/wiki/PDP-11_architecture: “The CPU contains eight general-purpose 16-bit registers (R0 to R7). Register R7 is the program counter (PC)”
I’m not aware of any CPU where “every register could be the program counter”. Such a feature also feels weird to me from a design view because I think it complicates the hardware with few (code might be smaller for a limited set of jumps) benefits. Maybe you’re confusing that with the ability to jump to whatever address is in any of the general purpose registers?
“The SEP instruction can select any of the 16 registers to be the program counter. The SEX instruction can select any of the 16-bit registers to be the index register.”
What about privacy? Maybe not everyone wants to share his information with every far relative that you might never have met or twenty years ago when your grandmother died and you already have become a grandparent as well.
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